1. Field
This disclosure relates generally to level shifters, and more specifically, to a clocked single power supply level shifter.
2. Related Art
Reducing power consumption has become increasingly important in integrated circuits due to, for example, wide spread use of battery powered portable and handheld applications. There are various ways to reduce power consumption. For example, power consumption may be reduced by lowering the supply voltage. However, in certain electronic applications, it is difficult for all circuits to be low voltage circuits. Thus, circuits using high voltage power supplies may be connected together with circuits using low voltage power supplies. In such applications, when providing a signal to a high voltage circuit from a low voltage circuit, a level shifter, or level conversion, circuit is used to shift the voltage of the signal.
In multi-core system-on-a-chip (SoC) integrated circuits, two or more power supply domains may be used to achieve optimum speed, power, and reliability. Logic signals are conveyed from one power supply voltage domain to another power supply voltage domain using level shifting circuits implemented at boundaries between the domains. In a conventional level shifter circuit, a “crowbar” leakage current path may develop for certain voltage levels causing increased power consumption. Also, a conventional level shifter may require two power supply voltages to fully level shift a signal. A level shifter supplied by two power supply voltages causes routing congestion at the boundary between the two power supply domains. In addition, a conventional level shifter may only translate a logic high or a logic low voltage. Some applications may require that both the high and low logic levels be translated at the same time.
Therefore, what is needed is a level shifter that solves the above problems.